Part Number Hot Search : 
L3015 MBRF3010 B7105 101MC TC74AC64 T28LV D72069GF C1473
Product Description
Full Text Search
 

To Download SFU9130 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 Advanced Power MOSFET
FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 10 A (Max.) @ VDS = -100V Lower RDS(ON) : 0.225 (Typ.)
1
SFR/U9130
BVDSS = -100 V RDS(on) = 0.3 ID = -9.8 A
D-PAK
2 1 3
I-PAK
2
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt
o Total Power Dissipation (TA=25 C) * o o
Value -100 -9.8 -6.9
1 O
Units V A A V mJ A mJ V/ns W W W/ C
o
39 + 20 _ 320 -9.8 5.7 -6.5 2.5 57 0.46 - 55 to +150
O 1 O 1 O 3 O
2
Total Power Dissipation (TC=25 C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8" from case for 5-seconds
o
TJ , TSTG TL
o
C
300
Thermal Resistance
Symbol RJC RJA RJA Characteristic Junction-to-Case Junction-to-Ambient * Junction-to-Ambient Typ. ---Max. 2.19 50 110
o
Units C/W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
(c)1999 Fairchild Semiconductor Corporation
SFR/U9130
Symbol BVDSS BV/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain("Miller") Charge Min. Typ. Max. Units -100 --2.0 ------------------0.1 ------5.2 160 60 13 22 45 25 30 5.4 12.2 ---4.0 -100 100 -10 -100 0.3 -240 90 35 55 100 60 38 --nC ns A pF V V nA
P-CHANNEL POWER MOSFET
Electrical Characteristics (TC=25oC unless otherwise specified)
Test Condition VGS=0V,ID=-250A See Fig 7 VDS=-5V,ID=-250A VGS=-20V VGS=20V VDS=-100V VDS=-80V,TC=125 C VGS=-10V,ID=-4.9A VDS=-40V,ID=-4.9A
4 O 4 O
o
o V/ C ID=-250A
800 1035
VGS=0V,VDS=-25V,f =1MHz See Fig 5 VDD=-50V,ID=-10.5A, RG=12 See Fig 13 VDS=-80V,VGS=-10V, ID=-10.5A See Fig 6 & Fig 12
45 OO 45 OO
Source-Drain Diode Ratings and Characteristics
Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
1 O
4 O
Min. Typ. Max. Units --------120 0.53 -9.8 -39 -4.0 --A V ns C
Test Condition Integral reverse pn-diode in the MOSFET TJ=25 C,IS=-9.8A,VGS=0V TJ=25 C,IF=-10.5A diF/dt=100A/s
4 O
o o
Notes ; 1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature O 2 O L=5.0mH, IAS=-9.8A, V DD=-25V, R G=27*, Starting T J =25oC 3 _ _ _ O ISD < -10.5A, di/dt < 400A/ s, VDD < BVDSS , Starting T J =25oC 4 Pulse Test : Pulse Width = 250 s, Duty Cycle < 2% _ O 5 O Essentially Independent of Operating Temperature
P-CHANNEL POWER MOSFET
Fig 1. Output Characteristics
V GS
SFR/U9130
Fig 2. Transfer Characteristics
[A] -ID , Drain Current
101
[A]
1 10
Top :
-ID , Drain Current
- 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom : - 4.5 V
150 oC 100 25 oC @ Notes : 1. V = 0 V GS 2. V = -40 V DS - 55 oC 3. 250 s Pulse Test
0 10
@ Notes : 1. 250 s Pulse Test 2. T = 25 oC C 10-1 10-1 100
1 10
10-1
2
4
6
8
10
-VDS , Drain-Source Voltage [V]
-VGS , Gate-Source Voltage [V]
RDS(on) , [ ] Drain-Source On-Resistance
1.0
0.8
-IDR , Reverse Drain Current
[A]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
101
0.6 VGS = -10 V 0.4
100 150 oC 25 oC @ Notes : 1. V = 0 V GS 2. 250 s Pulse Test
0.2 VGS = -20 V 0.0 0 7 14 21 28 35 42 @ Note : T = 25 oC J
10-1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
Ciss= C + Cgd ( Cds= shorted ) gs Coss= C + Cgd ds
Fig 6. Gate Charge vs. Gate-Source Voltage
[V]
VDS = -20 V VDS = -50 V VDS = -80 V
1500
[pF]
Crss= C gd C iss 1000
C oss 500 C rss @ Notes : 1. V = 0 V GS 2. f = 1 MHz
-VGS , Gate-Source Voltage
10
Capacitance
5
@ Notes : I =-10.5 A D 0 0 5 10 15 20 25 30 35
0 100
101
-VDS , Drain-Source Voltage [V]
QG , Total Gate Charge [nC]
SFR/U9130
Drain-Source Breakdown Voltage
P-CHANNEL POWER MOSFET
Fig 8. On-Resistance vs. Temperature
Drain-Source On-Resistance
2.5
Fig 7. Breakdown Voltage vs. Temperature
1.2
-BV , (Normalized) DSS
RDS(on) , (Normalized)
2.0
1.1
1.5
1.0
1.0 @ Notes : 1. V = -10 V GS 2. I = -5.3 A D -50 -25 0 25 50 75 100 125 150 175
0.9
@ Notes : 1. V = 0 V GS 2. I = -250 A D -50 -25 0 25 50 75 100
o
0.5
0.8 -75
125
150
175
0.0 -75
TJ , Junction Temperature [ C]
TJ , Junction Temperature [oC]
[A]
Fig 9. Max. Safe Operating Area
102 Operation in This Area is Limited by R DS(on)
Fig 10. Max. Drain Current vs. Case Temperature
12
-ID , Drain Current
[A]
10 0.1 ms
-ID , Drain Current
102
8
101 10 ms DC 100 @ Notes : 1. T = 25 oC C 2. T = J 3. Single Pulse 10-1 100 150 oC
1 ms
6
4
2
1 10
0 25
50
75
100
125
150
-VDS , Drain-Source Voltage [V]
Tc , Case Temperature [oC]
Fig 11. Thermal Response
Thermal Response
10 0
D=0.5 @ Notes : 1. Z J C (t)=2.19 o C/W Max. 2. Duty Factor, D=t1 /t 2 3. TJ M -T C =P D M *Z J C (t)
0.2 0.1 0.05 10- 1 0.02 0.01 single pulse
P. DM t1. t2.
Z
JC
(t) ,
10- 5
10- 4
10 - 3
10 - 2
10 - 1
100
10 1
t 1 , Square Wave Pulse Duration
[sec]
P-CHANNEL POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
SFR/U9130
" Current Regulator "
50K 12V 200nF 300nF
Same Type as DUT
VGS Qg
-10V
VDS VGS DUT
-3mA
Qgs
Qgd
R1
Current Sampling (IG) Resistor
R2
Current Sampling (ID) Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL Vout Vin RG DUT -10V Vout
90%
t on
t off tr td(off) tf
VDD
( 0.5 rated VDS )
td(on)
Vin
10%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
LL VDS
Vary tp to obtain required peak ID
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD
tp
ID VDD
Time VDS (t)
RG DUT -10V
tp
C
VDD
ID (t) IAS BVDSS
SFR/U9130
P-CHANNEL POWER MOSFET
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
+ VDS DUT -IS L Driver RG VGS
Compliment of DUT (N-Channel)
VGS
VDD
* dv/dt controlled by "RG" * IS controlled by Duty Factor "D"
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
10V
Body Diode Reverse Current
IS ( DUT )
IRM
di/dt IFM , Body Diode Forward Current
Vf VDS ( DUT )
Body Diode Forward Voltage Drop Body Diode Recovery dv/dt
VDD
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM
DISCLAIMER
ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 TinyLogicTM
UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.


▲Up To Search▲   

 
Price & Availability of SFU9130

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X